Legit, some dude in US Congress is wanting to crack down on China via… RISC-V exports, because oh no, the technology is too open and might give China some of our IP. Oh and by the way, dude has a pretty big Intel portfolio, but nevermind that!!
As an aside, why the hell are lawmakers allowed to trade stocks?
It’s especially dumb because RISC-V is – dare I say it – inevitably the future. Trying to crack down on RISC-V is like trying to crack down on Linux or solar photovoltaics or wind turbines. That is, you can try to crack down, but the fundamental value proposition is simply too good. All you’ll achieve in cracking down is hurting yourself while everyone else gets ahead.
I’d compare it to the RSA encryption algorithm. It was classified as a weapon by the US and was banned from being spread internationally, so open source advocates put the source code basically everywhere. It was even printed on shirts
This talk, given by David Patterson (a legend in computer architecture and one of the people who helped create RISC-V at UC Berkeley) is an excellent (and accessible) introduction.
Yeah, I’m working in embedded ML, and it’s an insanely exciting time. We’re getting more and more microcontrollers and single-board computers with special AI accelerators, many of them RISC-V, by the day it seems. One of the next steps (in my opinion) is finding a good way to program them that doesn’t involve C/C++ (very fast but also so painful to do AI with) or Python (slow unless it’s wrapping underlying C code, and unsuitable for microcontrollers). In fact, that’s exactly what I’m working on right now as a side project.
What’s also cool is RISC-V promises to be the one instruction set architecture to rule them all. So instead of having PCs as x86, phones and microcontrollers as ARM, then all sorts of other custom architectures like DSPs (digital signal processors), NPUs, etc., we could just have RISC-V with a bunch of open standard extensions. Want vector instructions? Well, here’s a ratified open standard for vector instructions. Want SIMD instructions? Congrats, here’s another ratified open standard.
And all these standards mean it will make it so much easier for the compiler people to provide support for new chips. A day not too long from now, I imagine it will become almost trivial to compile programs that can accelerate tons of scientific, numerical, and AI workloads onto RISC-V vector instructions. Currently, we’re stuck using GPUs for everything that needs parallelization, even though they’re far from the easiest or most optimal devices for many of our computational needs.
As computing advances, we can just create and ratify new open standards. Tired of floating point numbers? You could create a proposal for a standard posit extension today if you wanted to, then fork LLVM or GCC or something to provide the software support as well. In fact, someone already has implemented an open-source RISC-V chip with posit arithmetic and made a fork of LLVM to support it. You could fire it up on an FPGA right now if you wanted.
To answer your question, because we the people allowed it and we continue to allow it by not demanding it be ended or at the very least supporting candidates campaigning on doing something about it.
By people, you mean the Republican voter. We Democrats can’t put pressure on our candidates about these issues because losing means a batshit insane right wing / nazi / Christian nationalist wins…
So we have to pick and chose our battles. I’ve got bigger issues than multi millionaires being allowed to trade stocks.
Right now RISc-V has the same problem that ARM has in that anything that is affordable is pretty much only single board computers. Luckily for RISc-V someone made a list of all the SBCs http://krimsky.net/articles/riscvsbc.html
For hardware folks: Using RISC-V.
Legit, some dude in US Congress is wanting to crack down on China via… RISC-V exports, because oh no, the technology is too open and might give China some of our IP. Oh and by the way, dude has a pretty big Intel portfolio, but nevermind that!!
As an aside, why the hell are lawmakers allowed to trade stocks?
It’s especially dumb because RISC-V is – dare I say it – inevitably the future. Trying to crack down on RISC-V is like trying to crack down on Linux or solar photovoltaics or wind turbines. That is, you can try to crack down, but the fundamental value proposition is simply too good. All you’ll achieve in cracking down is hurting yourself while everyone else gets ahead.
I’d compare it to the RSA encryption algorithm. It was classified as a weapon by the US and was banned from being spread internationally, so open source advocates put the source code basically everywhere. It was even printed on shirts
guess I gotta get familiar with RISC-V then
This talk, given by David Patterson (a legend in computer architecture and one of the people who helped create RISC-V at UC Berkeley) is an excellent (and accessible) introduction.
Here is an alternative Piped link(s):
This talk
Piped is a privacy-respecting open-source alternative frontend to YouTube.
I’m open-source; check me out at GitHub.
Thank you so much for that. I haven’t touched hardware in a long time, but it’s exciting to see how much impact it’s already had on ML.
Also, the bit about a 63,000x improvement over python is going to be something I bring up in a conversation I just see it.
Yeah, I’m working in embedded ML, and it’s an insanely exciting time. We’re getting more and more microcontrollers and single-board computers with special AI accelerators, many of them RISC-V, by the day it seems. One of the next steps (in my opinion) is finding a good way to program them that doesn’t involve C/C++ (very fast but also so painful to do AI with) or Python (slow unless it’s wrapping underlying C code, and unsuitable for microcontrollers). In fact, that’s exactly what I’m working on right now as a side project.
What’s also cool is RISC-V promises to be the one instruction set architecture to rule them all. So instead of having PCs as x86, phones and microcontrollers as ARM, then all sorts of other custom architectures like DSPs (digital signal processors), NPUs, etc., we could just have RISC-V with a bunch of open standard extensions. Want vector instructions? Well, here’s a ratified open standard for vector instructions. Want SIMD instructions? Congrats, here’s another ratified open standard.
And all these standards mean it will make it so much easier for the compiler people to provide support for new chips. A day not too long from now, I imagine it will become almost trivial to compile programs that can accelerate tons of scientific, numerical, and AI workloads onto RISC-V vector instructions. Currently, we’re stuck using GPUs for everything that needs parallelization, even though they’re far from the easiest or most optimal devices for many of our computational needs.
As computing advances, we can just create and ratify new open standards. Tired of floating point numbers? You could create a proposal for a standard posit extension today if you wanted to, then fork LLVM or GCC or something to provide the software support as well. In fact, someone already has implemented an open-source RISC-V chip with posit arithmetic and made a fork of LLVM to support it. You could fire it up on an FPGA right now if you wanted.
I got confused seeing my university’s YouTube channel open up, thought I clicked on a recording for one of my classes lol
If anyone else is from UBC, we’re over at [email protected]
To answer your question, because we the people allowed it and we continue to allow it by not demanding it be ended or at the very least supporting candidates campaigning on doing something about it.
By people, you mean the Republican voter. We Democrats can’t put pressure on our candidates about these issues because losing means a batshit insane right wing / nazi / Christian nationalist wins…
So we have to pick and chose our battles. I’ve got bigger issues than multi millionaires being allowed to trade stocks.
ITT:
I agree. I’ll happily take some of them downvotes please
JFC. Someone got paid off… Arm, Intel, apple? All three?
Leave my Espressif shit alone!
While we’re on the topic, can anyone recommend some good RISC-V computers? It seems interesting and I’d like to try it out.
Right now RISc-V has the same problem that ARM has in that anything that is affordable is pretty much only single board computers. Luckily for RISc-V someone made a list of all the SBCs http://krimsky.net/articles/riscvsbc.html