This is just a nitpicking question. Do Intel chips still have some space/transistors dedicated to SSE3? If they do, why can’t they implement SSE3 by other, more powerful instrutions (like AVX) to save die space?
This is just a nitpicking question. Do Intel chips still have some space/transistors dedicated to SSE3? If they do, why can’t they implement SSE3 by other, more powerful instrutions (like AVX) to save die space?
Modern x86 chips are so large that the space the decoder takes is relatively small.
It would be a different story if you wanted a tiny cheap low power chip. Then you might be better off with ARM or RISC-V.