The manufacturing method for Ryzen chiplet & Epyc are basically identical, with a different IOD and packaging complexity being the only real differences, so any additional production costs predominantly down to that part instead of something related to the wafer.
Yield/binning costs cancels themselves out because a CCD, the single most expensive part to design and manufacture, has all of its costs spread across the entire Epyc & Ryzen chiplet product stack. Intel doesn’t have that luxury, since Xeon & Core-S are two different sets of designs.
Ryzen APUs are a fundamentally different design to all the other Ryzen/Epyc stack. So even if the mobile chips command a higher ASP than Ryzen chiplet, they also carry with them a higher manufacturing cost because it isn’t subsidised by being part of the CCD production line.
That’s only explicitly true for Intel.
The manufacturing method for Ryzen chiplet & Epyc are basically identical, with a different IOD and packaging complexity being the only real differences, so any additional production costs predominantly down to that part instead of something related to the wafer.
Yield/binning costs cancels themselves out because a CCD, the single most expensive part to design and manufacture, has all of its costs spread across the entire Epyc & Ryzen chiplet product stack. Intel doesn’t have that luxury, since Xeon & Core-S are two different sets of designs.
Ryzen APUs are a fundamentally different design to all the other Ryzen/Epyc stack. So even if the mobile chips command a higher ASP than Ryzen chiplet, they also carry with them a higher manufacturing cost because it isn’t subsidised by being part of the CCD production line.